[Clang][LoongArch] Match GCC behaviour when parsing FPRs in asm clobbers #138391

ziyao233 · 2025-05-03T10:26:15Z

There're four possible formats to refer a register in inline assembly,

Numeric name without dollar sign ("f0")
Numeric name with dollar sign ("$f0")
ABI name without dollar sign ("fa0")
ABI name with dollar sign ("$fa0")

LoongArch GCC accepts 1 and 2 for FPRs before r15-8284[1] and all these formats after the chagne. But Clang supports only 2 and 4 for FPRs. The inconsistency has caused compatibility issues, such as QEMU's case[2].

This patch follows 0bbf3dd ("[Clang][LoongArch] Add GPR alias handling without $ prefix") and accepts FPRs without dollar sign prefixes as well to keep aligned with GCC, avoiding future compatibility problems.

Link: https://gcc.gnu.org/cgit/gcc/commit/?id=d0110185eb78f14a8e485f410bee237c9c71548d [1]
Link: https://lore.kernel.org/qemu-devel/[email protected]/ [2]

github-actions · 2025-05-03T10:26:32Z

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llvmbot · 2025-05-03T10:27:01Z

@llvm/pr-subscribers-clang

@llvm/pr-subscribers-backend-loongarch

Author: Yao Zi (ziyao233)

Changes

There're four possible formats to refer a register in inline assembly,

Numeric name without dollar sign ("f0")
Numeric name with dollar sign ("$f0")
ABI name without dollar sign ("fa0")
ABI name with dollar sign ("$fa0")

LoongArch GCC accepts 1 and 2 for FPRs before r15-8284[1] and all these formats after the chagne. But Clang supports only 2 and 4 for FPRs. The inconsistency has caused compatibility issues, such as QEMU's case[2].

This patch follows 0bbf3dd ("[Clang][LoongArch] Add GPR alias handling without $ prefix") and accepts FPRs without dollar sign prefixes as well to keep aligned with GCC, avoiding future compatibility problems.

Link: https://gcc.gnu.org/cgit/gcc/commit/?id=d0110185eb78f14a8e485f410bee237c9c71548d [1]
Link: https://lore.kernel.org/qemu-devel/20250314033150.53268-3-ziyao@disroot.org/ [2]

Full diff: https://github.com/llvm/llvm-project/pull/138391.diff

3 Files Affected:

(modified) clang/lib/Basic/Targets/LoongArch.cpp (+40-32)
(modified) clang/test/CodeGen/LoongArch/inline-asm-gcc-regs-error.c (-9)
(modified) clang/test/CodeGen/LoongArch/inline-asm-gcc-regs.c (+14)

diff --git a/clang/lib/Basic/Targets/LoongArch.cpp b/clang/lib/Basic/Targets/LoongArch.cpp
index ca742797d7a3b..0dc92b8a74639 100644
--- a/clang/lib/Basic/Targets/LoongArch.cpp
+++ b/clang/lib/Basic/Targets/LoongArch.cpp
@@ -82,38 +82,46 @@ LoongArchTargetInfo::getGCCRegAliases() const {
       {{"s6", "$s6", "r29"}, "$r29"},
       {{"s7", "$s7", "r30"}, "$r30"},
       {{"s8", "$s8", "r31"}, "$r31"},
-      {{"$fa0"}, "$f0"},
-      {{"$fa1"}, "$f1"},
-      {{"$fa2"}, "$f2"},
-      {{"$fa3"}, "$f3"},
-      {{"$fa4"}, "$f4"},
-      {{"$fa5"}, "$f5"},
-      {{"$fa6"}, "$f6"},
-      {{"$fa7"}, "$f7"},
-      {{"$ft0"}, "$f8"},
-      {{"$ft1"}, "$f9"},
-      {{"$ft2"}, "$f10"},
-      {{"$ft3"}, "$f11"},
-      {{"$ft4"}, "$f12"},
-      {{"$ft5"}, "$f13"},
-      {{"$ft6"}, "$f14"},
-      {{"$ft7"}, "$f15"},
-      {{"$ft8"}, "$f16"},
-      {{"$ft9"}, "$f17"},
-      {{"$ft10"}, "$f18"},
-      {{"$ft11"}, "$f19"},
-      {{"$ft12"}, "$f20"},
-      {{"$ft13"}, "$f21"},
-      {{"$ft14"}, "$f22"},
-      {{"$ft15"}, "$f23"},
-      {{"$fs0"}, "$f24"},
-      {{"$fs1"}, "$f25"},
-      {{"$fs2"}, "$f26"},
-      {{"$fs3"}, "$f27"},
-      {{"$fs4"}, "$f28"},
-      {{"$fs5"}, "$f29"},
-      {{"$fs6"}, "$f30"},
-      {{"$fs7"}, "$f31"},
+      {{"fa0", "$fa0", "f0"}, "$f0"},
+      {{"fa1", "$fa1", "f1"}, "$f1"},
+      {{"fa2", "$fa2", "f2"}, "$f2"},
+      {{"fa3", "$fa3", "f3"}, "$f3"},
+      {{"fa4", "$fa4", "f4"}, "$f4"},
+      {{"fa5", "$fa5", "f5"}, "$f5"},
+      {{"fa6", "$fa6", "f6"}, "$f6"},
+      {{"fa7", "$fa7", "f7"}, "$f7"},
+      {{"ft0", "$ft0", "f8"}, "$f8"},
+      {{"ft1", "$ft1", "f9"}, "$f9"},
+      {{"ft2", "$ft2", "f10"}, "$f10"},
+      {{"ft3", "$ft3", "f11"}, "$f11"},
+      {{"ft4", "$ft4", "f12"}, "$f12"},
+      {{"ft5", "$ft5", "f13"}, "$f13"},
+      {{"ft6", "$ft6", "f14"}, "$f14"},
+      {{"ft7", "$ft7", "f15"}, "$f15"},
+      {{"ft8", "$ft8", "f16"}, "$f16"},
+      {{"ft9", "$ft9", "f17"}, "$f17"},
+      {{"ft10", "$ft10", "f18"}, "$f18"},
+      {{"ft11", "$ft11", "f19"}, "$f19"},
+      {{"ft12", "$ft12", "f20"}, "$f20"},
+      {{"ft13", "$ft13", "f21"}, "$f21"},
+      {{"ft14", "$ft14", "f22"}, "$f22"},
+      {{"ft15", "$ft15", "f23"}, "$f23"},
+      {{"fs0", "$fs0", "f24"}, "$f24"},
+      {{"fs1", "$fs1", "f25"}, "$f25"},
+      {{"fs2", "$fs2", "f26"}, "$f26"},
+      {{"fs3", "$fs3", "f27"}, "$f27"},
+      {{"fs4", "$fs4", "f28"}, "$f28"},
+      {{"fs5", "$fs5", "f29"}, "$f29"},
+      {{"fs6", "$fs6", "f30"}, "$f30"},
+      {{"fs7", "$fs7", "f31"}, "$f31"},
+      {{"fcc0"}, "$fcc0"},
+      {{"fcc1"}, "$fcc1"},
+      {{"fcc2"}, "$fcc2"},
+      {{"fcc3"}, "$fcc3"},
+      {{"fcc4"}, "$fcc4"},
+      {{"fcc5"}, "$fcc5"},
+      {{"fcc6"}, "$fcc6"},
+      {{"fcc7"}, "$fcc7"},
   };
   return llvm::ArrayRef(GCCRegAliases);
 }
diff --git a/clang/test/CodeGen/LoongArch/inline-asm-gcc-regs-error.c b/clang/test/CodeGen/LoongArch/inline-asm-gcc-regs-error.c
index c5ecf0c929af8..cab6182ac61c3 100644
--- a/clang/test/CodeGen/LoongArch/inline-asm-gcc-regs-error.c
+++ b/clang/test/CodeGen/LoongArch/inline-asm-gcc-regs-error.c
@@ -8,13 +8,4 @@ void test(void) {
   register float a1 asm ("$f32");
 // CHECK: :[[#@LINE+1]]:24: error: unknown register name '$foo' in asm
   register int a2 asm ("$foo");
-
-/// Names not prefixed with '$' are invalid.
-
-// CHECK: :[[#@LINE+1]]:26: error: unknown register name 'f0' in asm
-  register float a5 asm ("f0");
-// CHECK: :[[#@LINE+1]]:26: error: unknown register name 'fa0' in asm
-  register float a6 asm ("fa0");
-// CHECK: :[[#@LINE+1]]:15: error: unknown register name 'fcc0' in asm
-  asm ("" ::: "fcc0");
 }
diff --git a/clang/test/CodeGen/LoongArch/inline-asm-gcc-regs.c b/clang/test/CodeGen/LoongArch/inline-asm-gcc-regs.c
index e1015f6fc01d5..b34a9f419183e 100644
--- a/clang/test/CodeGen/LoongArch/inline-asm-gcc-regs.c
+++ b/clang/test/CodeGen/LoongArch/inline-asm-gcc-regs.c
@@ -79,42 +79,54 @@ void test_s2() {
 // CHECK: call void asm sideeffect "", "{$f0}"(float undef)
 void test_f0() {
     register float a asm ("$f0");
+    register float b asm ("f0");
     asm ("" :: "f" (a));
+    asm ("" :: "f" (b));
 }
 
 // CHECK-LABEL: @test_f14
 // CHECK: call void asm sideeffect "", "{$f14}"(float undef)
 void test_f14() {
     register float a asm ("$f14");
+    register float b asm ("f14");
     asm ("" :: "f" (a));
+    asm ("" :: "f" (b));
 }
 
 // CHECK-LABEL: @test_f31
 // CHECK: call void asm sideeffect "", "{$f31}"(float undef)
 void test_f31() {
     register float a asm ("$f31");
+    register float b asm ("f31");
     asm ("" :: "f" (a));
+    asm ("" :: "f" (b));
 }
 
 // CHECK-LABEL: @test_fa0
 // CHECK: call void asm sideeffect "", "{$f0}"(float undef)
 void test_fa0() {
     register float a asm ("$fa0");
+    register float b asm ("fa0");
     asm ("" :: "f" (a));
+    asm ("" :: "f" (b));
 }
 
 // CHECK-LABEL: @test_ft1
 // CHECK: call void asm sideeffect "", "{$f9}"(float undef)
 void test_ft1() {
     register float a asm ("$ft1");
+    register float b asm ("ft1");
     asm ("" :: "f" (a));
+    asm ("" :: "f" (b));
 }
 
 // CHECK-LABEL: @test_fs2
 // CHECK: call void asm sideeffect "", "{$f26}"(float undef)
 void test_fs2() {
     register float a asm ("$fs2");
+    register float b asm ("fs2");
     asm ("" :: "f" (a));
+    asm ("" :: "f" (b));
 }
 
 // CHECK-LABEL: @test_fcc
@@ -122,5 +134,7 @@ void test_fs2() {
 // CHECK: call void asm sideeffect "", "~{$fcc7}"()
 void test_fcc() {
     asm ("" ::: "$fcc0");
+    asm ("" ::: "fcc0");
     asm ("" ::: "$fcc7");
+    asm ("" ::: "fcc7");
 }

ziyao233 · 2025-05-03T11:01:50Z

Cc @echristo, @xen0n thanks for your time and review.

xen0n

Thank you for the patch!

Test assertions can be updated as well -- check for two occurrences of the respective asm statement.

ziyao233 · 2025-05-05T10:57:38Z

Thank you for the patch!

Test assertions can be updated as well -- check for two occurrences of the respective asm statement.

Done. Checks for the GPR-related tests are updated as well.

clang/test/CodeGen/LoongArch/inline-asm-gcc-regs.c

wangleiat

LGTM, thanks.

wangleiat · 2025-05-19T08:16:41Z

There're four possible formats to refer a register in inline assembly,

Numeric name without dollar sign ("f0")

Numeric name with dollar sign ("$f0")

ABI name without dollar sign ("fa0")

ABI name with dollar sign ("$fa0")

LoongArch GCC accepts 1 and 2 for FPRs before r15-8284[1] and all these formats after the chagne. But Clang supports only 2 and 4 for FPRs. The inconsistency has caused compatibility issues, such as QEMU's case[2].

This patch follows 0bbf3dd ("[Clang][LoongArch] Add GPR alias handling without $ prefix") and accepts FPRs without dollar sign prefixes as well to keep aligned with GCC, avoiding future compatibility problems.

Link: https://gcc.gnu.org/cgit/gcc/commit/?id=d0110185eb78f14a8e485f410bee237c9c71548d [1] Link: https://lore.kernel.org/qemu-devel/[email protected]/ [2]

GCC handles vr and xr in the same way, but the generated registers are incorrect. For now, it's sufficient to handle only fr.

There're four possible formats to refer a register in inline assembly, 1. Numeric name without dollar sign ("f0") 2. Numeric name with dollar sign ("$f0") 3. ABI name without dollar sign ("fa0") 4. ABI name with dollar sign ("$fa0") LoongArch GCC accepts 1 and 2 for FPRs before r15-8284[1] and all these formats after the chagne. But Clang supports only 2 and 4 for FPRs. The inconsistency has caused compatibility issues, such as QEMU's case[2]. This patch follows 0bbf3dd ("[Clang][LoongArch] Add GPR alias handling without `$` prefix") and accepts FPRs without dollar sign prefixes as well to keep aligned with GCC, avoiding future compatibility problems. Link: https://gcc.gnu.org/cgit/gcc/commit/?id=d0110185eb78f14a8e485f410bee237c9c71548d [1] Link: https://lore.kernel.org/qemu-devel/[email protected]/ [2]

heiher

LGTM.

github-actions · 2025-06-28T08:47:22Z

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…ers (llvm#138391) There're four possible formats to refer a register in inline assembly, 1. Numeric name without dollar sign ("f0") 2. Numeric name with dollar sign ("$f0") 3. ABI name without dollar sign ("fa0") 4. ABI name with dollar sign ("$fa0") LoongArch GCC accepts 1 and 2 for FPRs before r15-8284[1] and all these formats after the chagne. But Clang supports only 2 and 4 for FPRs. The inconsistency has caused compatibility issues, such as QEMU's case[2]. This patch follows 0bbf3dd ("[Clang][LoongArch] Add GPR alias handling without `$` prefix") and accepts FPRs without dollar sign prefixes as well to keep aligned with GCC, avoiding future compatibility problems. Link: https://gcc.gnu.org/cgit/gcc/commit/?id=d0110185eb78f14a8e485f410bee237c9c71548d [1] Link: https://lore.kernel.org/qemu-devel/[email protected]/ [2]

llvmbot added clang Clang issues not falling into any other category clang:frontend Language frontend issues, e.g. anything involving "Sema" backend:loongarch labels May 3, 2025

xen0n reviewed May 4, 2025

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ziyao233 force-pushed the loongarch/fprs-in-asm-clobber branch from 37ec0ec to 4a3bf6d Compare May 5, 2025 10:56

ziyao233 requested a review from xen0n May 5, 2025 11:41

SixWeining requested review from wangleiat and removed request for xen0n May 6, 2025 09:46

ziyao233 requested a review from xen0n May 13, 2025 05:26

xen0n reviewed May 13, 2025

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clang/test/CodeGen/LoongArch/inline-asm-gcc-regs.c Outdated Show resolved Hide resolved

wangleiat approved these changes May 19, 2025

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xry111 mentioned this pull request May 29, 2025

Consistent support for FPR ABI names across toolchains loongson-community/discussions#88

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ziyao233 force-pushed the loongarch/fprs-in-asm-clobber branch from 4a3bf6d to 1f14ee7 Compare June 28, 2025 05:41

ziyao233 requested a review from xen0n June 28, 2025 07:18

heiher approved these changes Jun 28, 2025

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heiher merged commit 0ba456f into llvm:main Jun 28, 2025
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